These are some PCBs I designed for the first version of the Array scanner. They are some of my earliest designs. This scanner uses X and Y microstages to position a 2D array of sensors. This scanner was obsoleted and replaced with
version two.
CXM - a connector card at the end of the unit gathers digital, analog video, and high voltage lines to connect to the camera and to the host interface card. I did the schematic design and the PCB design for this simple card. Analog v
ideo signals are carefully protected to minicoax connectors. 19KB
CTRLBKPL - a backplane with control circuitry which carries cards for D/A and A/D functions, some image processing cards, and a microstage driver card. The video signals are sandwiched between ground planes at the top of the im
age (yellow). High voltage piezo-driving signals run across the bottom. This card integrates what had been two separate functions, a "control" card and a set of ribbon cables. 53KB
PIZ - a patented microstage driver uses the piezo feedback in reverse phase to stop microstage motion early. This card was carefully designed to maximize performance of the analog feedback side of the system. This circuit design was
done by
Ed Anderson. 49KB
DSP32 - 3 AT&T DSP32Cs and 3 banks of SRAM for image processing on the ISA bus. This is Brad Taylor's circuit design. A later, derivative, design carried 5 DSPs and 5 banks of RAM on a full length I
SA-form card running on Array's proprietary bus. 61KB
PCATDHWW - a wirewrap prototyping board which is twice the height of PCAT cards, fits into the ISA bus in a conputer with its cover off. Since a WW prototype can take up nearly twice the real estate of the same soldered compon
ents, this double height card is perfect for prototyping ISA boards. This board facilitated construction and testing of the
GSP (graphics signal processor) board built around TI's GSP chip. 44KB
Access to images of design work:
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